Recent Presentations
- 2008
- Design of a Switch-Level Analog model for Verilog. Presented at BMAS (Behavioral Modeling and Simulation) 2008.
- AMS Verification & Moore's Law -- Solutions for 45nM and beyond. Presented at Synopsys AMS Breakfast Panel at DAC, June 2008.
- Functional Verification in the Presence of Linear Analog Circuits. Presented at DVCon 2008.
- Mixed-Signal Integration: Functional Verification in the Presence of Linear Analog Components. Presented at DesignCon 2008.
- 2007
- PHY Verification - What's Missing? Presented at DVCon 2007.
- PHY Verification - Still an Open Problem. Presented at DesignCon 2008.
- 2006
- Implications of a Configuration-based Verification Environment. CDNLive! 2006. This paper was the winner of the People's Choice award in Functional Verification.